SiPS'2021

Chaired by Liang Liu (Lund University) and Ove Edfors (Lund University) A stage-wise conversion strategy for low latency deformable spiking CNNChunyu Wang, Jiapeng Luo and Zhongfeng WangA novel blind detection method and FPGA implementation for energy-efficient sidelink communicationsChenhao Zhang, Haiqin Hu, Shan Cao and Zhiyuan JiangFlexible Channel Estimation for 3GPP 5G IoT on a Vector Digital Signal ProcessorStefan Damjancevic, Samuel Ajay Dasgupta, Emil Matus, Dmitry Utyansky, Pieter van der Wolf and Gerhard FettweisInitial Analysis of Dynamic Panel Activation for Large Intelligent SurfacesNafiseh Mazloum, Sony Research and Ove EdforsLow-Latency Parallel Hermitian Positive-Definite Matrix Inversion for Massive MIMOErik Bertilsson, Carl Ingemarsson and Oscar Gustafsson

Chaired by Andreas Burg (EPFL)

Abstract:

Neural Networks are playing a key role in enabling machine vision and speech recognition however their computational complexity and memory demands are challenging which limits their deployment in particular within energy-constrained, embedded environments. To address these challenges, a broad spectrum of increasingly customized and heterogeneous hardware architectures has emerged, exploiting optimizations such as custom arithmetic and sparsity.

During this talk, we will discuss various forms of specializations that have been leveraged by the industry with their impact on potential applications, flexibility, performance, and efficiency. Furthermore, we will discuss how the specialization in hardware architectures can be automated through end-to-end tool flows.

Speaker Biography:

Michaela Blott is a Fellow at Xilinx Research in Dublin, Ireland, where she heads a team of international scientists driving exciting research to define new application domains for Xilinx devices, such as machine learning.

She earned a PhD from Trinity College Dublin and her Master’s degree from the University of Kaiserslautern, Germany, and brings over 25 years of leading edge computer architecture and advanced FPGA and board design, in research institutions (ETH Zurich and Bell Labs) and development organizations. She is heavily involved with the international research community serving as technical chair and TPC member (FPL, ISFPGA, DATE, etc.), industry advisor on numerous EU projects, and most recently received the Women in Tech Award 2019.

Chaired by Alexios Balatsoukas-Stimming, (Eindhoven University of Technology) Fully Convolutional Network-Based DOA Estimation with Acoustic Vector SensorSifan Wang, Jianhua Geng and Xin LouLow Resource Species Agnostic Bird Activity DetectionMark Anderson, John Kennedy and Naomi HarteDigital Predistortion with Compressed Observations for Cloud-based LearningArne Fischer-Bühner, Emil Matus, Manil Dev Gomony, Lauri Anttila, Gerhard Fettweis and Mikko ValkamaUnderstanding the Energy vs. Adversarial Robustness Trade-Off in Deep Neural NetworksKyungmi Lee and Anantha ChandrakasanFault-Tolerance of Binarized and Stochastic Computing-based Neural NetworksAmir Ardakani, Arash Ardakani and Warren Gross

Chaired by Georgios Karakonstantis, (Queen's University Belfast), Nuno Roma, (University of Lisbon) Globally Assisted Instance Normalization for Bandwidth-Efficient Neural Style TransferHsiu-Pin Hsu and Chao-Tsung HuangComputationally-efficient voice activity detection based on deep neural networksYan Xiong, Visar Berisha and Chaitali ChakrabartiMixed Precision l1 Solver for Compressive Depth Reconstruction: An ADMM Case StudyYun Wu, Andrew Wallace, Andreas Aßmann and Brian StewartCommunication and Computation Reduction for Split Learning using Asynchronous TrainingXing Chen, Jingtao Li and Chaitali Chakrabarti

Chaired by Emmanuel Boutillon (Université de Bretagne Sud), Marco Gomes (University of Coimbra) Energy-Efficient Adaptive Modulated Fixed-Complexity Sphere DecoderYun Wu and John McallisterParallel CN-VN processing for NB-LDPC decodersHassan Harb, Ali Al Ghouwayel, Laura Conde-Canencia, Cedric Marchand and Emmanuel BoutillonShort Codes with Near-ML Universal Decoding: Are Random Codes Good Enough?Vivian Papadopoulou, Marzieh Hashemipour-Nazari and Alexios Balatsoukas-StimmingTime sliding window for the detection of CCSK framesCamille Monière, Kassem Saied, Bertrand Le Gal and Emmanuel BoutillonImplementing a LoRa Software-Defined Radio on a General-Purpose ULP MicrocontrollerMathieu Xhonneux, Jérôme Louveaux and David Bol

Chaired by Andreas Burg (EPFL)

Abstract:

Compressive sensing (CS) is a promising solution for physiological signal acquisition in wireless healthcare systems. It enables new reduced-complexity designs of sensor nodes and helps to save overall transmission power in the wireless sensor network. Many CS-related sensors and reconstruction chips had been developed over past years. However, compared with the small sensor nodes, the reconstruction cost of the CS signals becomes dominant. Reconstructing all received CS signals becomes another significant overhead and bottleneck before they are sent to machine learning (ML) algorithms for data analytics. In this talk, we introduce a new design framework called Compressive Analytics (CA). By extracting the deterministic information of the CS signals, we can perform data analytics directly in the compressed domain “without” reconstructing the received CS signals. There are two advantages: Firstly, we can avoid the costly CS reconstruction operations at the receiver side. Secondly, we can perform the ML algorithm (e.g., SVM) in the compressed domain (in a much smaller dimension), rather than in the original signal domain, resulting in low-complexity ML. We exemplify the proposed CA by using two design cases. The first one is detecting Atrial Fibrillation (AF) from CS-compressed ECG signals. The overall parameters and multiplications are only 5% compared with the conventional “Reconstruction Learning (RL)” mechanism (Reconstruction followed by ML). The second one is compressed-domain ECG-based user identification. The ECG signal is a natural biometric that be measured continuously and transmitted over wireless channels. In certain extreme environments like clean room, it becomes the only viable solution for continuous biometric user identification. We will show a live demo of the proposed CS-domain ECG-based user identification by using MediaTek’s Sensio watch. The topics presented in this talk demonstrate the feasibility of linking CS directly with ML while bypassing the expensive CS reconstruction stage. They are applicable to CS-based wireless healthcare systems when extreme light-weight and low-power detection of physiological signals is in demand.

Speaker Biography:

An-Yeu (Andy) Wu (IEEE M’96-SM’12-F’15) received the B.S. degree from National Taiwan University in 1987, and the M.S. and Ph.D. degrees from the University of Maryland, College Park in 1992 and 1995, respectively, all in Electrical Engineering.

In August 2000, he joined the faculty of the Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University (NTU), where he is currently a Professor. His research interests include low-power/high-performance VLSI architectures for DSP and communication applications, adaptive/bio-medical signal processing, reconfigurable broadband access systems and architectures, and System-on-Chip (SoC)/Network-on-Chip (NoC)/AI platform for software/hardware co-design. He has published more than 280 refereed journal and conference papers in above research areas, together with six book chapters and 24 granted US patents.

From August 2007 to Dec. 2009, he was on leave from NTU and served as the Deputy General Director of SoC Technology Center (STC), Industrial Technology Research Institute (ITRI), Hsinchu, TAIWAN, supervising WiMAX, Parallel Core Architecture (PAC) VLIW DSP Processor, and Android-based Multicore SoC platform projects. From March 2014 to September 2017, Dr. Wu was the Director of national talent cultivation program office in National Program for Intelligent Electronics (NPIE), under sponsorship of Ministry of Education in Taiwan.

In 2015, Prof. Wu was elevated to IEEE Fellow for his contributions to “DSP algorithms and VLSI designs for communication IC/SoC”. He received 2019 ECE Distinguished Alumni Award from ECE department of University of Maryland (UMD), and 2019 Outstanding Engineering Professor Award, from the Chinese Institute of Engineers (CIE), Taiwan. From August 2016 to July 2019, he served as the Director of Graduate Institute of Electronics Engineering (GIEE), National Taiwan University. He now serves as a Board of Governor (BoG) Member in IEEE Circuits and Systems Society (CASS) for two terms (2016-2018, 2019-2021). Prof. Wu also serves as Editor-in-Chief (EiC) of IEEE Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS) since 2020.

Chaired by Joseph R. Cavallaro (Rice University), Jani Boutellier (University of Vaasa) TernGEMM: GEneral Matrix Multiply Library with Ternary Weights for Fast DNN InferenceSeokhyeon Choi, Kyuhong Shim, Jungwook Choi, Wonyong Sung and Byonghyo ShimAutomatic Generation of Dynamic Inference Architecture for Deep Neural NetworksShize Zhao, Liulu He, Xiaoru Xie, Jun Lin and Zhongfeng WangExploration and Generation of Efficient FPGA-based Deep Neural Network AcceleratorsNermine Ali, Jean-Marc Philippe, Benoit Tain and Philippe CoussyOneAI - Novel Multipurpose Deep Learning Algorithms for UWB Wireless NetworksArash Abbasi and Huaping LiuDesign and Implementation of Autoencoder-LSTM Accelerator for Edge Outlier DetectionNadya Mohamed and Joseph Cavallaro

Chaired by Warren Gross (McGill University), Xinmiao Zhang (Ohio State University) A Memory-Efficient Hardware Architecture for Deformable Convolutional NetworksYue Yu and Zhongfeng WangEfficient Architecture for Long Integer Modular Multiplication over Solinas PrimeZheang Huai, Keshab Parhi and Xinmiao ZhangAn Efficient Parallel Architecture for Resource-Shareable Reed-Solomon EncoderYok Jye Tang and Xinmiao ZhangHigh-Throughput VLSI Architecture for GRAND Markov OrderSyed Mohsin Abbas, Warren J. Gross and Marwan Jalaleddine

Chaired by Christoph Studer (ETH Zurich) and Farhana Sheikh (Intel Corporation) Uplink Energy Efficiency of Cell-Free Massive MIMO with Transmit Power Control in Measured Propagation ChannelsThomas Choi, Masaaki Ito, Issei Kanno, Takeo Ohseki, Kosuke Yamazaki, and Andreas F. MolischCompressive Estimation of Wideband mmW Channel using Analog True-Time-Delay ArrayVeljko Boljanovic and Danijela CabricBeam Slicing for Jammer Suppression in mmWave Massive MU-MIMOOscar Castañeda, Gian Marti, and Christoph StuderA Scalable Generator for Massive MIMO Baseband Processing Systems with Beamspace Channel EstimationYue Dai, Harrison Liew, Maryam Eslami Rasekh, Seyed Hadi Mirfarshbafan, Alexandra Gallyas, James Dunn, Upamanyu Madhow, Christoph Studer, Borivoje NikolicAn On-Off Receiver Array for Low-Power Scaling of mmWave Massive MIMOMaryam Eslami Rasekh, Navid Hosseinzadeh, Upamanyu Madhow, Mark J. W. Rodwell

Chaired by Roger Woods (Queen's University Belfast), Ching-Te Chiu (National Tsing Hua University, Taiwan) DFBNet: Deep Neural Network based Fixed Beamformer for Multi-channel Speech SeparationRuqiao Liu, Yi Zhou, Hongqing Liu, Xinmeng Xu, Jie Jia and Binbin ChenEfficient Mind-wandering Detection System with GSR Signals on MM-SART DatabaseLi-Sheng Chang, Yi-Ta Chen and An-Yeu WuLeveraging Transprecision Computing for Machine Vision Applications at the EdgeUmar Minhas, Lev Mukhanov, Georgios Karakonstantis, Hans Vandierendonck and Roger WoodsImplementation of a Two-Dimensional FFT/IFFT Processor for Real-Time High-Resolution Synthetic Aperture Radar ImagingHung-Yuan Chin, Pei-Yun Tsai and Szy-Yuan LeeComplexBeat: Breathing Rate Estimation from Complex CSISitian Li, Andreas Toftegaard Kristensen, Andreas Burg and Alexios Balatsoukas-Stimming

Chaired by Andreas Burg (EPFL)

Abstract:

Over the last decades, cellular radio access has delivered a phenomenal 100x increase in data rate every decade. We are further projecting a 100x increase in data rate over the next 10 years. Assuming a constant energy per transmitted bit, this would not be possible. Up to date, semiconductor scaling, as well as circuit and network innovation has kept the required energy within boundaries. However, physical limits are starting to cloud the future.

Just as we shift gears in a gasoline powered car, and additionally have the gas pedal to optimize performance and energy, we can use a similar approach in the future PHYsical layer (PHY) of radio access networks. After a quick 6G vision, this talk will therefore dive into presenting the concept of a Gearbox-PHY and address some potential magnitude in energy savings.

Speaker Biography:

Gerhard P. Fettweis, F’09, earned a Ph.D. under H. Meyr at RWTH Aachen. After a postdoc at IBM Research, San Jose, he joined TCSI, Berkeley. Since 1994 he is Vodafone Chair Professor at TU Dresden. Since 2018 he is founding director of the new Barkhausen Institute. 2019 he was elected into the DFG Senate. He researches wireless transmission and chip design, coordinates 5GLab Germany, spun-out 17 tech and 3 non-tech startups, and is member of the German Academy of Sciences (Leopoldina), and Germany Academy of Engineering (acatech).

Chaired by Warren Gross (McGill University), Chaitali Chakrabarti (Arizona State University) Scalable Hardware Architecture for Invertible Logic with Sparse Hamiltonian MatricesNaoya Onizawa, Akira Tamakoshi, and Takahiro HanyuReconfigurable Neural Synaptic Plasticity based Stochastic Deep Neural Network ComputingZihan Xia, Ya Dong, Jienan Chen, Rui Wan, Shuai Li and Tingyong WuHartley Stochastic Computing For Convolution Neural NetworksSeyyed Hasan Mozafari, Jim Clark, Warren Gross and Brett MeyerDesign and Implementation of a Highly Accurate Stochastic Spiking Neural NetworkChengcheng Tang and Jie Han

Chaired by Deepak Dasalukunte (Intel Corporation), Richard Dorrance (Intel Corporation) Evaluation of Low-Voltage SRAM for Error-Resilient Augmented Reality ApplicationsTony Wu, Doyun Kim, Daniel Morris, Edith BeigneEnergy Efficiency of Photonic Convolution for Artificial Intelligence WorkloadsJonas Weiss, Pascal Starrk, Lorenz K. Muller, Folkert Horst, Roger Dangel and Bert Jan OffreinsEfficient Neuromorphic Signal Processing with Loihi 2Garrick Orchard, E. Paxon Frady, Daniel Ben-Dayan Rubin, Sophia Sanborn, Sumit Bam Shrestha, Friedrich Sommer and Mike DaviesExploration of Energy-Efficient Architecture for Graph-Based Point-Cloud Deep LearningJie-Fang Zhang and Zhengya ZhangA Multi-Domain Architectural Efficiency MetricSumeet Singh Nagi and Dejan Markovic